发明名称 A first-in first-out (FIFO) memory architecture providing multiport functionality
摘要 The present invention related to a first-in first-out (FIFO) memory architecture (10, 20) providing multiport functionality and comprising: - a plurality of single-port memory structures (11, 21a, 21b); - an indexing block (12, 22) for storing information about a single-port memory structure (11, 21a, 21b) in which incoming data is being stored in each data write operation; and - an access controller (13, 23) for controlling operations on the single-port memory structures (11, 21a, 21b) based on the contents of the indexing block (12, 22). A method of operating a plurality of single port memory structures (11, 21a, 21b) as a FIFO multiport memory architecture (10, 20) for sequential memory operations is also described.
申请公布号 EP1811370(A2) 申请公布日期 2007.07.25
申请号 EP20060027048 申请日期 2006.12.29
申请人 STMICROELECTRONICS PVT. LTD. 发明人 KAPIL, BATRA
分类号 G06F5/06;G06F5/16 主分类号 G06F5/06
代理机构 代理人
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