发明名称 System for reducing second order intermodulation products from differential circuits
摘要 A passive CMOS differential mixer circuit with a mismatch correction circuit for balancing the electrical characteristics of the two output paths. Once the output paths of the differential circuit are balanced, or matched as closely as possible, second order intermodulation product generation can be inhibited or at least reduced to acceptable levels. The mismatch correction circuit receives a digital offset signal, and generates one or more voltage signals to be selectively applied to the signal paths of the passive differential mixer circuit. The voltage signals can be adjusted back gate bias voltages applied to the bulk terminals of selected transistors to adjust their threshold voltages, or the voltage signals can be adjusted common mode voltages applied directly to a selected signal path. Since the differential mixer circuit is passive, no DC current contribution to noise is generated. The switching transistors of the mixer circuit can be maintained at minimal dimensions to reduce switching signal drive loading, resulting in lower power consumption and higher operating frequencies than if larger switching transistors were used.
申请公布号 US2007132500(A1) 申请公布日期 2007.06.14
申请号 US20050298667 申请日期 2005.12.12
申请人 SIRIFIC WIRELESS CORPORATION 发明人 EMBABI SHERIF H.;HOLDEN ALAN R.;JAEHNIG JASON P.;BELLAOUAR ABDELLATIF
分类号 G06F7/44 主分类号 G06F7/44
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