发明名称 |
METHOD OF FORMING NON-VOLATILE MEMORY CELL USING SACRIFICIAL PILLAR SPACERS AND NON-VOLATILE MEMORY CELL FORMED ACCORDING TO THE METHOD |
摘要 |
<p>A method of forming a icroelectronic non-volatile memory cell (200) , a memory-cell formed according to the method, and a system including the memory cell. The method comprises: providing a substrate (206) , providing a pair of spaced apart isolation bodies (201) on the substrate, the isolation bodies including respective raised isolation portions (222) , providing the pair comprising providing a buffer layer (221) on the substrate; providing pillar spacers (224) on side walls of the raised isolation portions; removing the buffer layer after providing the pillar spacers; removing the pillar spacers during removing the buffer layer; providing a tunnel dielectric (204) on the surface of the substrate after removing the buffer layer; providing a floating gate (202) on the tunnel dielectric; a reducing a height of the isolation bodies to yield corresponding isolation regions; providing source and drain regions on opposite sides of the floating gate,- providing an interpoly dielectric (208) on the floating gate; and providing a control gate (210) on the interpoly dielectric to yield the memory cell.</p> |
申请公布号 |
WO2007059239(A1) |
申请公布日期 |
2007.05.24 |
申请号 |
WO2006US44397 |
申请日期 |
2006.11.14 |
申请人 |
INTEL CORPORATION;SOSS, STEVEN, R.;PARAT, KRISHNA |
发明人 |
SOSS, STEVEN, R.;PARAT, KRISHNA |
分类号 |
H01L21/336;H01L21/28;H01L21/762;H01L21/8247;H01L29/423;H01L29/788 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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