METHOD FOR CONTROLLED PROGRAMMING OF NON-VOLATILE MEMORY EXHIBITING BIT LINE COUPLING

摘要

The effects of bit line-to-bit line coupling in a non-volatile memory are addressed. An inhibit voltage is applied on a bit line (202) of a storage element to be programmed (224) to inhibit programming during a portion of a. program voltage . The inhibit voltage is subsequently removed during the program voltage to allow programming to occur. Due to the proximity of bit lines (202, 204) , the change in the bit line voltage is coupled to a neighboring unselected bit line (204) , reducing the neighboring bit line voltage to a level which might be sufficient to open a select gate and discharge a boost voltage. To prevent this, the select gate voltage (VSGD) is temporarily adjusted during the change in the bit line voltage to ensure that the biasing of the select gate on the unselected bit line is not sufficient to open the select gate .