| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of wiring a power source of a semiconductor integrated circuit for improving wiring efficiency as a whole of a semiconductor integrated chip to supply sufficient current to the entire circuit without depending on a size of a region congested with lines. SOLUTION: A line congestion degree of the entire circuit is estimated. When a region with a high line congestion degree which is hard to wire a general signal line is detected; wiring pitches for mesh-like power source lines are enlarged, a wiring width is reduced, or both of these are done. Then, a voltage drop of the circuit is estimated. When the largest voltage drop quantity on the entire circuit is determined to exceed a predetermined allowable quantity, a region with a lower congestion degree of normal lines than the estimated degree and thus with a sufficient margin in wiring capacity is detected. For the detected region, the wiring pitches for the mesh-like power source lines are reduced, the wiring width is enlarged, or both of these are done. COPYRIGHT: (C)2007,JPO&INPIT
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