发明名称 |
Command multiplier for built-in-self-test |
摘要 |
Disclosed is a flexible command multiplication scheme for the built-in-self test (BIST) of a high-speed embedded memory array that segments BIST functionality into remote lower-speed executable instructions and local higher-speed executable instructions. A stand-alone BIST logic controller operates at a lower frequency and communicates with a command multiplier using a low-speed BIST instruction seed set. The command multiplier uses offset or directive registers to drive a logic unit or ALU to generate "n" sets of CAD information which are then time-multiplexed to the embedded memory at a speed "n" times faster than the BIST operating speed.
|
申请公布号 |
US7194670(B2) |
申请公布日期 |
2007.03.20 |
申请号 |
US20040708184 |
申请日期 |
2004.02.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORP. |
发明人 |
FALES JONATHAN R.;FREDEMAN GREGORY J.;GORMAN KEVIN W.;JACUNSKI MARK D.;KIRIHATA TOSHIAKI;NORRIS ALAN D.;PARRIES PAUL C.;WORDEMAN MATTHEW R. |
分类号 |
G01R31/28;G06F11/00;G11C29/14;G11C29/16 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|