发明名称 REDUNDANT CIRCUIT AND SEMICONDUCTOR DEVICE EQUIPPED WITH IT
摘要 PROBLEM TO BE SOLVED: To provide a redundant circuit efficient in testing and a semiconductor device equipped with it. SOLUTION: When testing to find defective bits, the defective bits are extracted and their addresses are written in electric fuses, then check testing is made to confirm the written addresses. The electric fuses are used for all the redundant circuits, and recovery-impossible signals are outputted when the defective bits are found. Each circuit has multiple fuse-set blocks each having several electric fuses and a fuse selection circuit. When testing to find the defective bits, the fuse selection circuit selects a fuse block to program next and the selected fuse block holds address signals inputted at testing in a register circuit. When the defective bit is found in the testing, the electric fuse in the selected fuse-set block is programmed, and the content of the programmed electric fuse is compared with the address signals stored in the register circuit. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007066380(A) 申请公布日期 2007.03.15
申请号 JP20050249473 申请日期 2005.08.30
申请人 ELPIDA MEMORY INC 发明人 KODAMA TAKUYO
分类号 G11C29/04;G11C11/401;G11C29/44 主分类号 G11C29/04
代理机构 代理人
主权项
地址