| 摘要 |
PROBLEM TO BE SOLVED: To allow both reducing in loss at on-time of an insulated-gate bipolar transistor, and higher speed of rising time at switching. SOLUTION: An n-type silicon substrate 102 is formed on a p-type silicon substrate 101, and n-type silicon substrates 103 and 104 are sequentially formed on the n-type silicon substrate 102. The impurity concentration is gradually decreased from the p-type silicon substrate 101 to the n-type silicon substrate 104 on the upper layer. A gate oxide film 107, a gate electrode 108, and a p-type well layer 105 are formed on the n-type silicon substrate 104 in the upper layer. An n-type emitter layer 106 is formed at a p-type well layer 105. Further, a protective film 111 is formed on a part of the n-type emitter layer 106 and the gate electrode 108, and an emitter electrode 110 is formed on a part of the p-type well layer 105 and on a part of the n-type emitter layer 106. A collector electrode 109 is formed on the surface of the p-type silicon substrate 101 which is opposite to the one contacting the n-type silicon substrate 102. COPYRIGHT: (C)2007,JPO&INPIT
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