发明名称 Technique to simultaneously distribute clock signals and data on integrated circuits, interposers, and circuit boards
摘要 A technique is described for simultaneously and synchronously transmitting digital data and a clock signal in a digital integrated circuit, circuit board, or system. The technique is based on the phase shift keying (PSK) modulation of an RF high frequency carrier which is distributed on low impedance interconnection transmission lines. The PSK modulation contains the digital data while the carrier itself constitutes the clock signal, and the clock signal and digital data are transmitted in a synchronous manner. The carrier frequency may be near f<SUB>T</SUB>, the maximum operation frequency of the transistors. Since the digital data and clock signal are simultaneously transmitted on the same interconnection, the digital data never becomes skewed with respect to the clock signal, or vice versa.
申请公布号 US2007053467(A1) 申请公布日期 2007.03.08
申请号 US20060594480 申请日期 2006.11.08
申请人 发明人 FORBES LEONARD
分类号 H04L27/22 主分类号 H04L27/22
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