发明名称 |
PRE EMPHASIS CIRCUIT INCLUDING SLEW RATE CONTROLLABLE BUFFER |
摘要 |
A pre emphasis circuit including a slew rate controllable buffer is provided to increase the width of a voltage step by controlling a slew rate of an output signal of the buffer. A first buffer(410) outputs a first main output signal and a second main output signal by buffering a first main input signal and a second main input signal, and controls a slew rate of the first main output signal and the second main output signal by using at least one main control signal. A second buffer(420) outputs a first sub output signal and a second sub output signal by buffering a first sub input signal and a second sub input signal, and controls a slew rate of the first sub output signal and the second sub output signal by using at least one sub control signal. An output driving device(430) generates a first output signal and a second output signal whose pre emphasis level is controlled according to the slew rate of output signals of the first buffer and the second buffer, by using two control signals and output signals provided from the first buffer and the second buffer.
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申请公布号 |
KR100688567(B1) |
申请公布日期 |
2007.02.22 |
申请号 |
KR20050078420 |
申请日期 |
2005.08.25 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, CHI WON;KWAK, MYOUNG BO;SHIN, JONG SHIN |
分类号 |
H03K19/0175 |
主分类号 |
H03K19/0175 |
代理机构 |
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主权项 |
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