| 摘要 |
<p>A frequency synthesizer which switches the frequency at high rate, has a high signal/noise ratio with reduced power consumption, and is arranged such that a CMOS orthogonal VCO (31, 32) outputs a four-phase signal (36, 37), respectively. A CMOS selector (33) selects any one of the two four-phase signals (36, 37) generated from the CMOS orthogonal VCO (31, 32) and delivers it as an output signal (38). A CMOS SSB mixer (34) multiplies the output signal (38) selected by the CMOS selector (33) by an externally inputted four-phase input signal (39) to produce a signal having a frequency equal to the sum of or difference between frequencies of the output signal (38) and the four-phase input signal (39) and deliver it as an output signal (40). A CML buffer (35) adjusts the level of the output signal (40) from the CMOS SSB mixer (34) before delivering it to other circuits.</p> |
