| 摘要 |
Integrated circuit design often involves combination of blocks of circuit from different sources to create new designs. However, a simulation of a block developed using a given method may not be compatible with another simulation created using another method. A method for modifying hardware simulation having one internal timing regime to enable interoperation with another simulation having a different internal timing regime is described. In particular, it involves modification of models in a domain in which variables are used so that they are interoperable with models in a domain using signals.
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