Integrated circuit with low-stress under-bump metallurgy

摘要

An integrated circuit (IC) (200) includes a semiconductor material (102), electronic circuitry (104) formed on the semiconductor material (102), a contact layer (106) formed on the electronic circuitry (104), a final passivation layer (108) formed on the contact layer (106) and an under-bump metallurgy (UBM) (216) formed on at least a portion of the final passivation layer (108). The contact layer (106) includes a plurality of contacts pads (106A) for providing external access to the electronic circuitry (104). The final passivation layer (108) includes a plurality of windows that extend through the final passivation layer (108) to the contact pads (106A). The UBM (216) includes an aluminum layer having a thickness of about 800 angstroms to about 1200 angstroms, a nickel/vanadium (Ni/V) layer having a thickness of about 800 angstroms to about 1200 angstroms and a copper (Cu) layer having a thickness of about 800 angstroms to about 1200 angstroms.