发明名称 |
Multiple clock domain microprocessor |
摘要 |
A multiple clock domain (MCD) microarchitecture uses a globally-asynchronous, locally-synchronous (GALS) clocking style. In an MCD microprocessor each functional block operates with a separately generated clock, and synchronizing circuits ensure reliable inter-domain communication. Thus, fully synchronous design practices are used in the design of each domain.
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申请公布号 |
US2007016817(A1) |
申请公布日期 |
2007.01.18 |
申请号 |
US20060389023 |
申请日期 |
2006.03.27 |
申请人 |
ALBONESI DAVID;SEMERARO GREG;MAGKLIS GRIGORIOS;SCOTT MICHAEL L;BALASUBRAMONIAN RAJEEV;DWARKADAS SANDHYA |
发明人 |
ALBONESI DAVID;SEMERARO GREG;MAGKLIS GRIGORIOS;SCOTT MICHAEL L.;BALASUBRAMONIAN RAJEEV;DWARKADAS SANDHYA |
分类号 |
G06F1/00;G06F1/10;G06F1/32 |
主分类号 |
G06F1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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