| 摘要 |
The proposed Fourier and Hartley spectrum analyzer contains an analog-to-digital converter, three memory units, a unit for determining weighing coefficients, two multipliers, a subtracting unit, and additionally, two units for performing subtraction and addition operations, and two units for repeating or inverting numbers. The input of the analog-to-digital converter is used as the information input of the device, and the output is connected to the first input of the subtracting unit and the input of the first memory unit. The output of the first memory unit is connected to the second input of the subtracting unit. The output of the subtracting unit is connected to the first inputs of the first and the second multipliers. The first and the second outputs of the unit for determining weighing coefficients are connected accordingly to the information inputs of the first and the second units for repeating or inverting numbers. The outputs of the units for repeating or inverting numbers are connected accordingly to the second inputs of the first and second multipliers. The outputs of the multipliers are connected accordingly to the first inputs of the first and the second units for performing subtraction and addition operations. The outputs of the units for performing subtraction and addition operations are used as the first and the second outputs of the analyzer and connected to the inputs of the second and the third memory units. The outputs of these memory units are connected accordingly to the second inputs of the units for performing subtraction and addition operations. The control input of the analyzer is connected to the control inputs of the units for performing subtraction and addition operations.
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