| 摘要 |
A semiconductor memory device is provided to prevent data error by normally writing data, which is finally inputted in a tHD period, to a cell while satisfying tHD and tCBPH specification in a synchronous pseudo SRAM. A chip selection buffer part(200) receives a clock transition detection signal and a chip selection signal, and outputs a chip selection control signal to control a precharge operation time according to a time(tHD) from a rising edge of a clock to a rising edge of the chip selection signal and a high pulse sustain time(tCBPH) of the chip selection signal. A precharge part(300) controls a precharge operation time of a word line according to the chip selection control signal. A write/read strobe generation part(500) outputs a write/read strobe signal to control a write/read operation time of a memory cell, according to the chip selection control signal, a write/read strobe control signal, and the clock transition detection signal.
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