PLL modulation circuit and polar modulation apparatus

摘要

First and second calibration signals ( 308, 309 ) are sent to a frequency divider ( 102 ) and an adder ( 116 ) of a PLL section ( 100 A), demodulated in a demodulator ( 111 ), filtered through a low pass filter ( 113 ) and a high pass filter ( 114 ) and thereafter sent to a modulation signal control circuit ( 115 ). The modulation signal control circuit ( 115 ) generates control information ( 318 ) in comparison with the phase and amplitude of the first and second calibration signals ( 308 and 309 ) and sends the control information ( 318 ) to a modulation control signal generator ( 106 ). Modulation control signal generator ( 106 ) holds the control information ( 318 ) and controls the values of the first modulation signal and second modulation signal sent to the frequency divider ( 102 ) and adder ( 116 ) on the based on the control information ( 318 ) held in modulation operation.