发明名称 Associating a packet with a flow
摘要 A computer system includes a system memory, a processor and a peripheral. The peripheral includes a peripheral memory, a circuit, a first interface to receive a packet and a second interface that is adapted to communicate with the system memory. The peripheral memory is adapted to store a table that includes entries that identify different packet flows. The circuit is adapted to use the table to associate the packet with one of the packet flows and based on the association, interact with the second interface to selectively transfer a portion of the packet to the system memory for processing by the processor.
申请公布号 US7159030(B1) 申请公布日期 2007.01.02
申请号 US19990364085 申请日期 1999.07.30
申请人 INTEL CORPORATION 发明人 ELZUR URI
分类号 G06F15/173 主分类号 G06F15/173
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