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发明名称
IC封装体、其制造方法及积体电路装置
摘要
本发明之目的在于就积体电路之封装体,强化IC晶片之同步切换对电源或接地之电位之变动耐力及改善散热特性。本发明为一种IC封装体,其结构系具有用以搭载IC晶片之基板及包覆搭载于该基板之前述IC晶片之包覆部,于前述基板及前述包覆部两者或其中一者具有层叠之单一或复数电源层及接地层,藉使前述电源层及前述接地层隔着高介电体层相对配置,而内建单一或复数电容器者。又,IC封装体有使接触IC晶片之内侧导体层及外侧导体层藉由导热体(导热孔)而结合之结构及具有遮蔽导体部之结构。
申请公布号
TW200644186
申请公布日期
2006.12.16
申请号
TW094132993
申请日期
2005.09.23
申请人
富士通股份有限公司
发明人
岩间正泰
分类号
H01L23/12(2006.01);H01L23/28(2006.01);H01L21/56(2006.01);H05K3/46(2006.01)
主分类号
H01L23/12(2006.01)
代理机构
代理人
恽轶群;陈文郎
主权项
地址
日本
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