发明名称 METHOD FOR DESIGNING STRUCTURED ASICS IN SILICON PROCESSES WITH THREE UNIQUE MASKING STEPS
摘要 A multi-function core base cell includes a set of functional icrocircuits. These microcircuits are used to design a Library of Logic Function Macros. The functional macros consisting of one or more microcircuits have a fixed and complete physical layout similar to a conventional standard cell library macro set. In addition to a core functional macro set, primary input/output buffers (710) and commonly used single and dual port memory blocks (720) are also defined in the library. The library includes all the ASIC synthesis, simulation, and physical design rules.
申请公布号 WO2005124598(A3) 申请公布日期 2006.12.07
申请号 WO2005US20194 申请日期 2005.06.09
申请人 BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC.;BANSAL, JAI, P. 发明人 BANSAL, JAI, P.
分类号 G06F17/50;G06F17/30;H03K19/177 主分类号 G06F17/50
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