Semiconductor device for limiting leakage current

摘要

Formed on an insulator ( 9 ) are an N^- type semiconductor layer ( 10 ) having a partial isolator formed on its surface and a P^- type semiconductor layer ( 20 ) having a partial isolator formed on its surface. Source/drain ( 11, 12 ) being P⁺ type semiconductor layers are provided on the semiconductor layer ( 10 ) to form a PMOS transistor ( 1 ). Source/drain ( 21, 22 ) being N⁺ type semiconductor layers are provided on the semiconductor layer ( 20 ) to form an NMOS transistor ( 2 ). A pn junction (J 5 ) formed by the semiconductor layers ( 10, 20 ) is provided in a CMOS transistor ( 100 ) made up of the transistors ( 1, 2 ). The pn junction (J 5 ) is positioned separately from the partial isolators ( 41, 42 ), where the crystal defect is thus very small. Therefore, the leakage current is very low at the pn junction (J 5 ).