发明名称 SOI bottom pre-doping merged e-SiGe for poly height reduction
摘要 Semiconductor device structures, and methods for making such structures, are described that provide for fully-doped transistor source/drain regions while reducing or even avoiding boron penetration into the transistor channel, thereby improving the performance of the transistor. In addition, such a transistor may benefit from an SiGe layer that applies compressive stress to the transistor channel, thereby further improving the performance of the transistor
申请公布号 US2006234432(A1) 申请公布日期 2006.10.19
申请号 US20050107843 申请日期 2005.04.18
申请人 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 发明人 KOHYAMA YUSUKE
分类号 H01L21/338;H01L21/20 主分类号 H01L21/338
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