| 摘要 |
<P>PROBLEM TO BE SOLVED: To enhance the production yield of a semiconductor memory by reducing a standby current caused by a dummy bit line. <P>SOLUTION: When it is determined that the real bit line to be connected to a real memory cell is easily short-circuited to an adjacent circuit element, the dummy bit line is connected to a voltage line to be supplied to the circuit element. For example, the dummy bit line is directly connected to a negative voltage line through connection wiring. Alternatively, the dummy bit line is selectively connected to any one of the internal voltage lines. By applying this invention, occurrence of leak being generated between the dummy bit line and the circuit element is prevented even though the dummy bit line is short-circuited to the adjacent circuit element. Since leak is prevented, unnecessary operations of the generating circuit of an internal voltage are prevented and increase in the standby current is prevented. As a result, the production yield of the semiconductor memory is enhanced. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
