发明名称 Pattern forming method, semiconductor device manufacturing method and phase shift photomask having dummy gate patterns
摘要 In a method for forming a plurality of gate patterns in parallel with each other on a photoresist layer within one circuit block, at least one dummy gate pattern is formed in parallel with the gate patterns when a pitch between said gate patterns is larger than a predetermined maximum pitch, so that pitches between the gate patterns including the dummy gate pattern are smaller than the predetermined maximum pitch. Then, a photolithography process is performed upon the photoresist layer by using a phase shift photomask having first and second openings whose difference in phase is pi. The first and second openings alternate between the gate patterns including the dummy gate pattern to form phase edges therein.
申请公布号 US2006210889(A1) 申请公布日期 2006.09.21
申请号 US20060374009 申请日期 2006.03.14
申请人 NEC ELECTRONICS CORPORATION 发明人 FUJIMOTO MASASHI
分类号 G03C5/00;G03F1/30;G03F1/36;G03F1/68;G03F7/20;H01L21/027 主分类号 G03C5/00
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