| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which a high speed data transfer rate can be obtained even when external data bus width is shorter than information length of an error correction code to be used, further, increase of chip area can be suppressed. SOLUTION: The semiconductor memory device is provided with a write data transfer path, a read data transfer path, and a code generating circuit CODEGEN. The write data transfer path is arranged between an input buffer DINBUF and a cell array CA, and data inputted to the input buffer DINBUF is transmitted to the memory cell, the read data transfer path is arranged between the cell array CA and an output buffer DOUTBUF and data from the memory cell is transmitted to the output buffer DOUTBUF. The code generating circuit CODEGEN is arranged at the write data transfer path, decodes data, and generates the error correction code. Bit width of at least a part of a data bus in the write and read data transfer paths is larger than twice of the code length of the error correction code generated by the code generating circuit CODEGEN. COPYRIGHT: (C)2006,JPO&NCIPI
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