发明名称 |
Programmable non-volatile semiconductor memory device |
摘要 |
The present invention relates to a programmable non-volatile semiconductor memory device comprising a matrix of rows and columns of memory cells ( 1 ). To reduce the required memory area a 3T memory cell is proposed comprising a bridge of two bridge transistors (MN 0, MN 1 ), preferably NMOS transistors, a read transistor, preferably an PMOS transistor, and a silicided polysilicium fuse resistor (R). The read transistors enable the use of a single sense line (SL) for all memory cells ( 1 ) of the same row or column in the matrix thus enabling the use of a common sense amplifier for sensing memory cells ( 1 ).
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申请公布号 |
US7102910(B2) |
申请公布日期 |
2006.09.05 |
申请号 |
US20050536914 |
申请日期 |
2005.05.31 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS, N.V. |
发明人 |
PHAM CHAU BANG;SLENTER ANDRE GUILLAUME JOSEPH;CALAERTS GEERT GUSTAAF;HEMINGS MICHAEL COLIN;NGUYEN DUY |
分类号 |
G11C11/00;G11C17/16;G11C17/18 |
主分类号 |
G11C11/00 |
代理机构 |
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地址 |
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