发明名称 Static random access memory and pseudo-static noise margin measuring method
摘要 A first inverter includes a first load element and a first transistor, which are connected between first and second terminals in series, a first input terminal and a first output terminal. A second inverter includes a second load element and a second transistor, which are connected between third and fourth terminals in series, a second input terminal and a second output terminal. A first transfer transistor selectively and electrically connects the first output terminal and a first bit line. A second transfer transistor selectively and electrically connects the second output terminal and a second bit line. When data are read from the memory cell which comprises the first and second inverters and the first and second transfer transistors, a first potential is applied to the second terminal and a second potential different from the first potential is applied to the fourth terminal.
申请公布号 US7099182(B2) 申请公布日期 2006.08.29
申请号 US20040022791 申请日期 2004.12.28
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OHTAKE HIROYUKI;HIRABAYASHI OSAMU
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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