| 摘要 |
An apparatus, system, and method are disclosed for reducing integrated circuit peeling. This invention reduces integrated circuit peeling by providing a wafer with a solventphilic layer and removing unwanted film using a solvent that is philic to the solventphilic layer. In one embodiment, a boundary is provided to reduce the rotation speed precision required to reach the desired etching distance. In certain embodiments, a wet edge etching process is used to remove unwanted film from the perimeter of the solventphilic layer. In certain embodiments, the solventphilic layer comprises a hydrophilic layer such as silicon nitride, and the solvent comprises a solution of water and hydrogen fluoride.
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