发明名称
摘要 In a strongly testable DFT method, the length of a test sequence is reduced, thereby reducing the amount of circuitry to be added for testing purposes. Test plans, generated one for each of circuit elements forming a data path, are scheduled in parallel in a form that can be compacted, and a compaction operation is applied to generate a compacted test plan. The test sequence is generated by inserting the test patterns needed for each circuit element into the compacted test plan.
申请公布号 JP3803283(B2) 申请公布日期 2006.08.02
申请号 JP20010356511 申请日期 2001.11.21
申请人 发明人
分类号 G01R31/3183;G01R31/28;G01R31/317;G06F11/22 主分类号 G01R31/3183
代理机构 代理人
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