发明名称 |
Semiconductor device and method for fabricating the same |
摘要 |
A region of an Si layer 15 located between source and drain regions 19 and 20 is an Si body region 21 which contains an n-type impurity of high concentration. An Si layer 16 and an SiGe layer 17 are, in an as grown state, undoped layers into which no n-type impurity is doped. Regions of the Si layer 16 and the SiGe layer 17 located between the source and drain regions 19 and 20 are an Si buffer region 22 and an SiGe channel region 23 , respectively, which contain the n-type impurity of low concentration. A region of an Si film 18 located directly under a gate insulating film 12 is an Si cap region 24 into which a p-type impurity (5x10<SUP>17 </SUP>atoms.cm<SUP>-3</SUP>) is doped. Accordingly, a semiconductor device in which an increase in threshold voltage is suppressed can be achieved.
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申请公布号 |
US7084026(B2) |
申请公布日期 |
2006.08.01 |
申请号 |
US20040913383 |
申请日期 |
2004.08.09 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
TAKAGI TAKESHI;INOUE AKIRA |
分类号 |
H01L21/8238;H01L21/336;H01L29/10;H01L29/165;H01L29/786;H01L29/80 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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