发明名称 Semiconductor layer and forming method thereof, and semiconductor device and manufacturing method thereof technical field
摘要 The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor.
申请公布号 US2006163625(A1) 申请公布日期 2006.07.27
申请号 US20060341578 申请日期 2006.01.26
申请人 KOUMOTO TAKEYOSHI;YAMAGATA HIDEO 发明人 KOUMOTO TAKEYOSHI;YAMAGATA HIDEO
分类号 H01L29/76;H01L21/331;H01L29/737 主分类号 H01L29/76
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