发明名称 Package structure, e.g. flip chip ball grid array package, includes substrate having conductive lines, solder bumps, patterned elastic dielectric layers, and conductive layer to form zigzag conductive layer pattern
摘要 A package structure comprises a substrate having conductive lines, solder bumps (A13), a patterned first elastic dielectric layer, a conductive layer to form a zigzag conductive layer pattern, and a second elastic dielectric layer having openings including solder bumps. A package structure comprises: (1) a substrate having conductive lines; (2) solder bumps electrically coupling with the conductive lines; (3) a patterned first elastic dielectric layer covering a partial region of a passivation layer formed on chips; (4) a conductive layer formed on the patterned first elastic dielectric layer to form a zigzag conductive layer pattern due to the topography of the patterned first elastic dielectric layer, where the zigzag conductive layer pattern is partially attached on the passivation layer and partially attached on the first elastic dielectric layer; and (5) a second elastic dielectric layer covering the conductive layer, the second elastic dielectric layer having openings, each of the openings having solder bumps electrically coupling with one of the conductive lines. An independent claim is also included for a conductive bumping arrangement for a package, comprising: (1) bonding pads formed on a die; and (2) bumpings formed over the die and connected to the bonding pads by conductive traces, where an included angle between a line segment from center (C1) of the die to center (C2) of the bumping and a radius orientation from the center of the bumping of the conductive traces departing from the bumping is greater than 45[deg].
申请公布号 DE102004061876(A1) 申请公布日期 2006.06.01
申请号 DE20041061876 申请日期 2004.12.22
申请人 ADVANCED CHIP ENGINEERING TECHNOLOGY INC. 发明人 YANG, WEN-KHUN
分类号 H01L23/50;H01L23/498 主分类号 H01L23/50
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