发明名称 Methods for reduced circuit area and improved gate length control
摘要 Semiconductor devices ( 102 ) are presented along with fabrication methods ( 202 ) therefor, in which a conductive contact structure ( 116 b) is formed with a lower contact surface ( 116 c) having a lateral contact dimension ( 152 ), where the contact structure ( 116 b) is at least partially coupled with a contact landing surface of a polysilicon structure ( 110 ) having a lateral contact landing surface dimension ( 150 ) that is less than about 140% of the lateral contact dimension ( 152 ) of the conductive contact structure ( 116 b).
申请公布号 US2006113604(A1) 申请公布日期 2006.06.01
申请号 US20040000715 申请日期 2004.12.01
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 TIGELAAR HOWARD LEE;PACHECO ROTONDARO ANTONIO LUIS
分类号 H01L23/52;H01L21/4763 主分类号 H01L23/52
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