发明名称 Apparatus and method for dynamically enabling and disabling interrupt coalescing in data processing system
摘要 An apparatus and method for dynamically enabling and disabling interrupt coalescing in a data processing system. The present invention involves consistently monitoring IO load on an IOP of an IO adapter. The firmware on the IO adapter may have a global variable that stores counters for PCI function registers. Each counter tracks the number of outstanding IOs of a corresponding PCI function register. The counter is incremented whenever a new IO is received and is decremented upon posting the completed message back to the OS. A timer interrupt is generated periodically so that an ISR may be periodically performed. In the ISR, the maximum value stored of each counter seen since last timer interrupt is analyzed. When the maximum value stored is greater than a predetermined threshold value, the interrupt coalescing is enabled.
申请公布号 US7054972(B2) 申请公布日期 2006.05.30
申请号 US20020319206 申请日期 2002.12.13
申请人 LSI LOGIC CORPORATION 发明人 PARRY OWEN N.;BESMER BRAD D.;JOHNSON STEPHEN B.
分类号 G06F13/24 主分类号 G06F13/24
代理机构 代理人
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