发明名称 Memory buffer for memory module, has memory-sided bus system and redundancy memory between which bus signal is transmitted and redirected on basis of comparison of memory cell addresses
摘要 <p>The buffer has a memory logic unit (8) connected with a memory-sided bus system (MBS) and a host-sided bus system (HBS). A redundancy memory (15) is provided such that memory cell addresses of the memory logic unit are compared with addresses of another memory cell unit. A bus signal that is transmitted between the memory-sided bus system and the redundancy memory is redirected based on the comparison of the memory cell addresses. Independent claims are also included for the following: (A) a method for operating a memory buffer (B) a memory module with a memory buffer.</p>
申请公布号 DE102004056214(A1) 申请公布日期 2006.05.24
申请号 DE20041056214 申请日期 2004.11.22
申请人 INFINEON TECHNOLOGIES AG 发明人 BUCKSCH, THORSTEN
分类号 G11C29/24 主分类号 G11C29/24
代理机构 代理人
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