| 摘要 |
A method and apparatus is disclosed that significantly reduces preamble detection complexity, while maintaining superior signaling performance. This simplification can lead to higher data throughput within processing-limited receivers, and/or a greater degree of parallelism in multiple channel receivers. The preamble detector receives the digitized input I and Q samples (1) represent the reconstructed base band with preamble. The preamble detection proceeds via a carrier derotation block (2), Sign blocks (3a and 3b), a differential decoder (5), a multiplexer (6), a preamble shift register (7), and other logic circuit block to found the preamble. |
