发明名称 Block de-interleaving system
摘要 The block de-interleaving system includes an input for receiving a set of time-aligned blocks or interleaved data, physical memory unit, and a de-interleaving block for writing the blocks in the memory in a first predetermined manner and reading the blocks from the memory in a second predetermined manner to de-interleave the data of the blocks. The physical memory unit may include several different physical memories, and the de-interleaving block is adapted to completely write and read a block into and from one physical elementary memory.
申请公布号 US2006050678(A1) 申请公布日期 2006.03.09
申请号 US20050220955 申请日期 2005.09.07
申请人 STMICROELECTRONICS S.R.L. 发明人 WELLIG ARMIN;ZORY JULIEN;IMBESI PASQUALE
分类号 H04J3/24;H03M13/27 主分类号 H04J3/24
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