| 摘要 |
<p>A minimal area integrated circuit implementation of a polyphase interpolation filter using symmetry of coefficients for at least one channel of input data, comprising, an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a channel select multiplexer block selecting a channel in response to a first set of internal control signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals , an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block for synchronization of filtered signal, and a control block to generate clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware requirement of coefficient set implementation in a polyphase interpolation filter.</p> |
