发明名称 Cache memory system
摘要 A cache memory system is used in a motion estimation system. The system includes: a first cache memory defined in terms of a first width and a first height, and a second cache memory defined in terms of a second width and a second height, wherein said second height is less than said first height, the cache memory system being operable in one of two modes: the first mode being characterized by banks of memory from the second cache memory being concatenated vertically such that their concatenated height is at least equal to the first height, and said concatenated banks being arranged to be appended to the width of the first cache memory to form a single contiguous address space; and the second mode being characterized by banks of memory from the first and second cache being stacked vertically, and being arranged to be addressed as two separate address spaces.
申请公布号 US7006100(B2) 申请公布日期 2006.02.28
申请号 US20030677629 申请日期 2003.10.02
申请人 STMICROELECTRONICS ASIA PACIFIC PTE LTD. 发明人 PHONG KAH-HO;HUI LUCAS Y. W.
分类号 G09G5/36;G06F13/00;G06T1/60;H04N7/12;H04N7/26 主分类号 G09G5/36
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