发明名称 Shallow trench isolation method
摘要 A method ( 200 ) of forming an isolation structure is presented, in which a hard mask layer ( 304, 308 ) is formed ( 204, 206 ) over the isolation and active regions ( 305, 303 ) of a semiconductor body ( 306 ), and a dopant is selectively provided to a portion of the active region ( 303 ) proximate the isolation region ( 305 ) to create a threshold voltage compensation region ( 318 ). After the compensation region ( 318 ) is created, the hard mask layer ( 304, 308 ) is patterned ( 218 ) to create a patterned hard mask. The patterned hard mask is then used in forming ( 222 ) a trench ( 323 ) in the isolation region ( 305 ) near the compensation region ( 318 ), and the trench ( 323 ) is then filled ( 224 ) with a dielectric material ( 338 ).
申请公布号 US2006024909(A1) 申请公布日期 2006.02.02
申请号 US20040899663 申请日期 2004.07.27
申请人 MEHROTRA MANOJ;CHATTERJEE AMITAVA 发明人 MEHROTRA MANOJ;CHATTERJEE AMITAVA
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
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