发明名称 |
MANUFACTURING METHOD OF WIRING CIRCUIT BOARD |
摘要 |
PROBLEM TO BE SOLVED: To provide a method for efficiently manufacturing a highly reliable wiring board. SOLUTION: A plated layer 15 is formed in a thickness less than 0.1μm by conducting first non-electrolytic plating processing to a wiring pattern 12 formed on a base board 10 utilizing a plating solution 20 including at least one of thiourea and its derivative. The base board 10 is washed using a solvent 30 including amine. A resist layer 40 is formed partially covering the plated layer 15 to the base board 10. Second non-electrolytic plating processing is conducted to an area exposed from the resist layer 40 in the plated layer 15. Heating processing is not conducted between a first non-electrolytic plating process and a forming process of the resist layer 40. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2006032484(A) |
申请公布日期 |
2006.02.02 |
申请号 |
JP20040206069 |
申请日期 |
2004.07.13 |
申请人 |
SEIKO EPSON CORP |
发明人 |
AKATSUKA SATORU;ABE TSUTOMU;NANBA TOSHISHIGE |
分类号 |
H05K3/18;C23C18/52;H01L21/60;H05K3/24;H05K3/26 |
主分类号 |
H05K3/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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