发明名称 Multilevel semiconductor memory device
摘要 <p>A multilevel semiconductor EEPROM device characterized by comprising: n-value memory cells (n is 3 or a greater natural number), each having a first threshold voltage to store "1," a second threshold voltage to store "2," a third threshold voltage to store "3," and an i-th threshold voltage to store "i" (i is a natural number equal to or less than n), €ƒ€ƒ€ƒ wherein during the first programming operation, each memory cell stores "1" in the input data is a first logic level and stores "2" in the input data is a second logic level, and during the kth programming operation, each memory cell stores "A" in the input data is a (2k-1)th logic level and stores "A+2 k-1 " in the input data is a 2kth logic level in the case where the memory cell has been storing "A" during a (k-1)th programming operation (k is 2 or a greater natural number).</p>
申请公布号 EP1615227(A2) 申请公布日期 2006.01.11
申请号 EP20050022209 申请日期 1997.03.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKEUCHI, KEN;TANAKA, TOMOHARU
分类号 G11C11/56 主分类号 G11C11/56
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