发明名称 Level shifter circuit with stress test function
摘要 A level shifter circuit includes first and second reference potential supply lines; first and second output potential supply circuits each connected between the first and second reference potential supply lines; first and second input lines; first and second output lines; and a stress test circuit which functions to, during normal operation, when the first input signal and the second input signal are input to the first input line and the second input line, output the first output signal and the second output signal having respectively different potentials for the first output line and the second output line, and during the stress test, when the first input signal and the second input signal are input to the first input line and the second input line, output signals having identical potentials from the first output line and the second output line.
申请公布号 US2005280461(A1) 申请公布日期 2005.12.22
申请号 US20040944862 申请日期 2004.09.21
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 TERAISHI TOSHIO
分类号 G09G3/36;G01R31/28;G09G3/00;G09G3/20;G11C5/14;G11C8/00;(IPC1-7):G11C8/00 主分类号 G09G3/36
代理机构 代理人
主权项
地址
您可能感兴趣的专利