| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having large surge strength. <P>SOLUTION: In this DRAM, an n+ type drain region 7d of a field transistor 7 included in an internal protection circuit 9 is replaced by p+ type drain region 7d', and a bias potential V1 larger than a power supply potential VCC is applied to an n type well region NW below the p+ type drain region 7d'. Thus, a vertical pnp bipolar transistor is formed with the p+ type drain region 7d', the n type well region NW below it, and a p type silicon substrate 20, thereby, the surge immunity increases. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
