| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a register circuit whose power consumption is fixed regardless of the change of internal states. <P>SOLUTION: This circuit is provided with not only a main register 11 which stores input data but also a dummy register 13 which does not contribute to the storage of input data. When both data values on a data input line 21 and a data output line 22 of the main register 11 are determined to match with each other by a monitor circuit 12 which monitors the data values, a write enable line 23 is activated synchronously with a clock signal CLK, and the value of data stored in the dummy register 13 is inverted, and the data value stored in either the main register 11 or the dummy register 12 is necessarily inverted each time the clock signal CLK rises, and power consumption is uniformly held regardless of the transition of the data value. <P>COPYRIGHT: (C)2004,JPO |
