| 摘要 |
PROBLEM TO BE SOLVED: To provide the configuration of a scan path having high utilization efficiency of area. SOLUTION: In normal operation, a shift mode signal SM is set to "0", and a signal given to the "0" input end of selectors 10-12, namely the output of a logic section 80, is transmitted to flip flops 30-31. When performing the logic scan test of the logic sections 80, 81, a test mode signal TEST is set to "1", and a normal scan test is performed by a simple scan path having the same number of bits as that of written data using a scan flip flop in which the selectors 10-12 and the flip flops 30-32 are paired. The flip flop for writing in normal operation, and that used for scan flip flops in the logic test are shared. COPYRIGHT: (C)2005,JPO&NCIPI
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