发明名称 |
Conductive lines embedded in isolation regions |
摘要 |
The circuit has a semi-conductor substrate (101) with an active zone (104) surrounding or surrounded by recesses (125, 126) filled with an insulating material. Conducting regions (140, 141) are centered in the insulating material of the respective recesses, and are connected to a supply or ground conductive line of an interconnection network, and a nearest component e.g. source/drain zone (132) of a transistor, of the circuit. - An INDEPENDENT CLAIM is also included for a method of manufacturing conductive lines laid in an integrated circuit substrate. |
申请公布号 |
EP1569273(A3) |
申请公布日期 |
2005.09.14 |
申请号 |
EP20050104911 |
申请日期 |
2004.07.29 |
申请人 |
ST MICROELECTRONICS S.A. |
发明人 |
SCHOELLKOPF, JEAN-PIERRE;CERUTTI, ROBIN;CORONEL, PHILIPPE;SKOTNICKI, THOMAS |
分类号 |
H01L21/74;H01L21/762;H01L21/765;H01L21/768;H01L21/8244;H01L23/485;H01L23/528;H01L23/535;H01L27/11;H01L29/78;(IPC1-7):H01L21/765 |
主分类号 |
H01L21/74 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|