发明名称 VIDEO SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a video signal processor compatible with multi-scanning by which a dot clock is adjusted so as to enable a user to easily acquire an optimum image without providing a special function to a video output device. SOLUTION: A counter 1 counts the number of horizontal synchronization signals within one vertical synchronization period and obtains the number of vertical lines. A microcomputer 3 sets the frequency division ratio of a PLL circuit 4 by multiplying the number of the vertical lines by a coefficient value based on a predetermined aspect ratio and generates the approximate dot clock. An image for adjustment is read from an image memory 6 by the generated dot clock and displayed on a monitor. Then the dot clock is adjusted by operating an image adjustment button 10. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005244659(A) 申请公布日期 2005.09.08
申请号 JP20040052378 申请日期 2004.02.26
申请人 TEAC CORP 发明人 TOKUMOTO FUMIHIRO
分类号 G09G3/36;G09G3/20;G09G5/00;H04N5/66;(IPC1-7):H04N5/66 主分类号 G09G3/36
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