发明名称 ARRAY TYPE PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide an array type processor capable of executing processing operations corresponding to a plurality of computer programs in parallel in a pseudo manner. SOLUTION: In this array type processor 100, a state management part 105 and a data pass part 106 are stopped when event data for task switching are inputted in a state that it holds a plurality of computer programs. The operation state of the stopped state management part 105 and the processing data of the data pass part 106 are acquired and temporarily held for each of the computer programs, and when the temporary holding is completed, the operation state and processing data of the other computer program are read and set to the state management part 105 and the data pass part 106. When the setting is completed, event data for an operation start are outputted to the state management part 105. The state management part 105 then starts the successive transition of the operation state. Therefore, the processing operations corresponding to the plurality of computer programs can be executed in a time division base. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005222141(A) 申请公布日期 2005.08.18
申请号 JP20040026799 申请日期 2004.02.03
申请人 NEC CORP;NEC ELECTRONICS CORP 发明人 INUO TAKESHI;KAJIWARA NOBUKI;TOI TAKAO;AWASHIMA TORU;KAMI HIROKAZU;FUJII TARO;ANJO KENICHIRO;FURUTA KOUICHIROU;MOTOMURA MASATO
分类号 G06F9/46;G06F15/00;G06F15/80;(IPC1-7):G06F15/80 主分类号 G06F9/46
代理机构 代理人
主权项
地址