| 摘要 |
PROBLEM TO BE SOLVED: To improve a data transfer rate of a bus, in a system LSI adopting a time-sharing bus control system. SOLUTION: For example, when executing writeback of a system memory 17, a CPU 13 sets time slot control information to a time slot setting storage part 12a of a bus arbiter 12 on the basis of setting information previously defined in a program for executing the writeback. The CPU 13 controls a time slot value ID generated by a time slot generation part 12b such that the number of the time slot value ID of the CPU 13 occupied in a unit cycle is increased, on the basis of the time slot control information, so as to output a lot of data on the bus 11 in preference to other modules. COPYRIGHT: (C)2005,JPO&NCIPI
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